ENGLISH

Hardware Architectures for Post-Quantum Digital Signature Schemes

By Ramesh Karri , Deepraj Soni , Kanad Basu , Mohammed Nabeel , Najwa Aaraj , Marc Manzano

Book information

Publisher
Springer International Publishing;Springer
Year
2021
ISBN
9783030576813, 9783030576820
DOI
10.1007/978-3-030-57682-0
Language
english
Format
PDF
Filesize
5 MB (5168357 bytes)
Edition
1st ed.
Pages
XXII, 170\185
Time added
2021-01-06 05:41:07
Engineering; Circuits and Systems; Processor Archi

Description

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;Enables designers to build hardware implementations that are resilient to a variety of side-channels.

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