ENGLISH

High Performance Embedded Architectures and Compilers: 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings

By Paolo Faraboschi , Bob Iannucci (auth.) , Yale N. Patt , Pierfrancesco Foglia , Evelyn Duesterwald , Xavier Martorell (eds.)

Book information

Publisher
Springer-Verlag Berlin Heidelberg
Year
2010
ISBN
9783642115141, 3642115144
DOI
10.1007/978-3-642-11515-8
Language
english
Format
PDF
Filesize
9 MB (9378335 bytes)
Series
Lecture Notes in Computer Science 5952 : Theoretical Computer Science and General Issues
Edition
1
Pages
370\382
Time added
2013-04-24 17:00:00
Arithmetic and Logic Structures; Processor ArchiteCompilersInterpreters

Description

This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.

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