The Verilog® Hardware Description Language

Description

Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog. The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design. The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included. Front Matter....Pages i-xxi Verilog – A Tutorial Introduction....Pages 1-34 Logic Synthesis....Pages 35-71 Behavioral Modeling....Pages 73-107 Concurrent Processes....Pages 109-142 Module Hierarchy....Pages 143-155 Logic Level Modeling....Pages 157-193 Cycle-Accurate Specification....Pages 195-210 Advanced Timing....Pages 211-238 User-Defined Primitives....Pages 239-250 Switch Level Modeling....Pages 251-282 Projects....Pages 283-292 Back Matter....Pages 293-381