VLSI Design: Circuits, Systems and Applications : Select Proceedings of ICNETS2, Volume V

Description

This book gathers a collection of papers by international experts presented at the International Conference on NextGen Electronic Technologies (ICNETS2-2017), which cover key developments in the field of electronics and communication engineering. ICNETS2 encompassed six symposia covering all aspects of the electronics and communications domains, including relevant nano/micro materials and devices. This book showcases the latest research in very-large-scale integration (VLSI) Design: Circuits, Systems and Applications, making it a valuable resource for all researchers, professionals, and students working in the core areas of electronics and their applications, especially in digital and analog VLSI circuits and systems. Front Matter ....Pages i-xiv Front-End CMOS Circuit for Low Power Consumption (K. Dinesh Kumar, K. Ferents Koni Jiavana)....Pages 1-7 A Preliminary Study of Oscillators, Phase and Frequency Detector, and Charge Pump for Phase-Locked Loop (PLL) Applications (R. Prithiviraj, J. Selvakumar)....Pages 9-18 All-Digital RF Transmitter with Highly Power-Efficient Doherty Power Amplifier (Deepa Pradeep, B. Ananda Venkatesan)....Pages 19-26 Adiabatic Techniques for Energy-Efficient Barrel Shifter Design (K. Anantharaman, A. V. M. Manikandan)....Pages 27-36 A 79 GHz CMOS LNA with Adaptive Biasing (D. Rubeena, J. Manjula)....Pages 37-47 X-band Phased-Array Transmitter in 180-nm SiGe BiCMOS Technology with Stacked Power Amplifier (Sijo Thomas, T. Saminathan)....Pages 49-58 Short-Range Low Data Rate Pulsed UWB Transmitter (G. Sarathy, S. Praveen Kumar)....Pages 59-68 A New High-Speed Multiplier Based on Carry-Look-Ahead Adder and Compressor (B. Jeevan, K. Sivani)....Pages 69-78 Real-Time Automatic Peaks and Onsets Detection of Photoplethysmographic Signals (P. Madhan Mohan, V. Nagarajan, J. C. Vignesh)....Pages 79-90 Design of Low-Power CMOS Four-Quadrant Analog Multiplier in Nanometer Scaling (N. Sharath, S. Suhasini)....Pages 91-98 Designing 5T Embedded DRAM Cell for Ultra-Low-Power Low-Voltage Applications Based on Schmitt Trigger (V. Snigdha Chandrika, M. Maria Dominic Savio)....Pages 99-108 Design and Implementation of Multi-bit Self-checking Carry Select Adder (Shivkumar Kavitkar, A. Anita Angeline)....Pages 109-115 A Novel Adiabatic Logic for Low Power VLSI Circuit Design and Power Optimization Using FinFET (B. P. Bhuvana, V. S. Kanchana Bhaaskaran)....Pages 117-126 Test Signal Generation for Detecting Faults on Mil-Std 1553 Bus (Sowmya Madhavan, S. Sandya)....Pages 127-134 Design of Ultra-Low-Voltage Energy Efficient Hybrid Full Adder Circuit (M. Mahaboob Basha, K. Venkata Ramanaiah, P. Ramana Reddy)....Pages 135-140 A Novel MTCMOS-Based On-Chip Soft-Start Circuit for Low Leakage LED Driver with Minimum In-Rush Current (P. Magesh Kannan, G. Nagarajan)....Pages 141-149 Implementation of Dual Hysteresis Mode Flip-Flop Multivibrator Using Differential Voltage Current Conveyor (Amit Bhattacharyya)....Pages 151-160 High Performance Domino Logic Circuit Design by Contention Reduction (A. Anita Angeline, V. S. Kanchana Bhaaskaran)....Pages 161-168 Differential Power Analysis (DPA) Resistant Cryptographic S-Box (A. Prathiba, K. M. Madhu, V. S. Kanchana Bhaaskaran)....Pages 169-178 Implementation of Radix-2 Butterfly Using Distributed Arithmetic Algorithm (DAA) (Ketan Tarkas, Chetan Sharma, Oshin Mehta, P. Augusta Sophy Beulet)....Pages 179-187 An Area Efficient Design of Warped Filters (Kruttika Golwelker, Ritu Kumari, T. Vigneswaran)....Pages 189-200 Design of Arithmetic and Logic Unit (ALU) Using Subthreshold Adiabatic Logic for Low-Power Application (Anagh Deshpande, T. Vigneswaran)....Pages 201-209 Design of Sample and Hold for High-Speed Analog to Digital Converter (D. Patel Konarkkumar, P. Augusta Sophy Beulet)....Pages 211-222 FPGA-Masked S-Box Implementation for AES Engine (Maneesha Jayakumar)....Pages 223-233 Pipelined and Parallel Architecture of Reversible Watermarking for Greyscale Images (M. Murali, A. Ravi Sankar, S. M. Sakthivel)....Pages 235-246 Design and Verification of AMBA AXI3 Protocol (Shweta Sharma, S. M. Sakthivel)....Pages 247-259 Design of Multi-stage CMOS OTA for Low-Power and High Driving Capability (Rama Krishna Murthy Paturi, P. Manikandan)....Pages 261-268 Back Matter ....Pages 269-270