ENGLISH

Correct Hardware Design and Verification Methods: IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings

Book information

Publisher
Springer-Verlag Berlin Heidelberg
Year
1993
ISBN
354056778X, 9783540567783
DOI
10.1007/BFb0021709
LCC
TK7874 .C55 1993
Open Library ID
OL1515169M
Language
english
Format
DJVU
Filesize
3 MB (2716532 bytes)
Series
Lecture Notes in Computer Science 683
Edition
1
Pages
275\278
Library
Kolxo3
DPI
300
Time added
2011-01-06 10:13:16

Description

These proceedings contain the papers presented at the Advanced Research Working Conference on Correct Hardware Design Methodologies, held in Arles, France, in May 1993, and organized by the ESPRIT Working Group 6018 CHARME-2and the Universit de Provence, Marseille, in cooperation with IFIP Working Group 10.2. Formal verification is emerging as a plausible alternative to exhaustive simulation for establishing correct digital hardware designs. The validation of functional and timing behavior is a major bottleneck in current VLSI design systems, slowing the arrival of products in the marketplace with its associated increase in cost. From being a predominantly academic area of study until a few years ago, formal design and verification techniques are now beginning to migrate into industrial use. As we are now witnessing an increase in activity in this area in both academia and industry, the aim of this working conference was to bring together researchers and users from both communities.

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