Symbolic Parallelization of Nested Loop Programs
Book information
Description
This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors. Front Matter ....Pages i-xii Introduction (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 1-7 Fundamentals and Compiler Framework (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 9-36 Symbolic Parallelization (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 37-92 Symbolic Multi-Level Parallelization (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 93-122 On-Demand Fault-Tolerant Loop Processing (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 123-153 Conclusions and Outlook (Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich)....Pages 155-158 Back Matter ....Pages 159-176
Similar books
Quick Start Guide to VHDL
Quick Start Guide to VHDL
EPUB
Electric Circuits, Systems, And Motors
2020 · PDF
A Short History Of Circuits And Systems: From Green, Mobile, Pervasive Networking To Big Data Computing
2016 · PDF
Handbook Of Digital CMOS Technology, Circuits, And Systems
2020 · PDF
Introductory Circuit Theory
2020 · PDF
Intelligent Embedded Systems: Select Proceedings of ICNETS2, Volume II
2018 · PDF
Machine Learning for Model Order Reduction
2018 · PDF