Microwave and Wireless Synthesizers: Theory and Design

Description

Cover Title Page Copyright Contents Author Biography Preface Important Notations Chapter 1 Loop Fundamentals 1-1 Introduction to Linear Loops 1-2 Characteristics of a Loop 1-3 Digital Loops 1-4 Type 1 First‐Order Loop 1-5 Type 1 Second‐Order Loop 1-6 Type 2 Second‐Order Loop 1-6-1 Transient Behavior of Digital Loops Using Tri‐state Phase Detectors 1-7 Type 2 Third‐Order Loop 1-7-1 Transfer Function of Type 2 Third‐Order Loop 1-7-2 FM Noise Suppression 1-8 Higher‐Order Loops 1-8-1 Fifth‐Order Loop Transient Response 1-9 Digital Loops with Mixers 1-10 Acquisition 1-10-0 Example 1 1-10-1 Pull‐in Performance of the Digital Loop 1-10-2 Coarse Steering of the VCO as an Acquisition Aid 1-10-3 Loop Stability References Suggested Reading Chapter 2 ALMOST ALL ABOUT PHASE NOISE 2-1 INTRODUCTION TO PHASE NOISE 2-1-1 The Clock Signal 2-1-2 The Power Spectral Density (PSD) 2-1-3 Basics of Noise 2-1-4 Phase and Frequency Noise 2-2 THE ALLAN VARIANCE AND OTHER TWO‐SAMPLE VARIANCES 2-2-1 Frequency Counters 2-2-2 The Two‐Sample Variances AVAR, MVAR, and PVAR 2-2-3 Conversion from Spectra to Two‐Sample Variances 2-3 PHASE NOISE IN COMPONENTS 2-3-1 Amplifiers 2-3-2 Frequency Dividers 2-3-3 Frequency Multipliers 2-3-4 Direct Digital Synthesizer (DDS) 2-3-5 Phase Detectors 2-3-6 Noise Contribution from Power Supplies 2-4 PHASE NOISE IN OSCILLATORS 2-4-1 Modern View of the Leeson Model 2-4-2 Circumventing the Resonator's Thermal Noise 2-4-3 Oscillator Hacking 2-5 THE MEASUREMENT OF PHASE NOISE 2-5-1 Double‐Balanced Mixer Instruments 2-5-2 The Cross‐Spectrum Method 2-5-3 Digital Instruments 2-5-4 Pitfalls and Limitations of the Cross‐Spectrum Measurements 2-5-5 The Bridge (Interferometric) Method 2-5-6 Artifacts and Oddities Often Found in the Real World 2-5 References 2-5 SUGGESTED READINGS 2-5-6 Power spectra and Fourier transform 2-5-6 Electromagnetic Compatibility 2-5-6 General Aspects of Noise 2-5-6 Phase Noise, Frequency Stability, and Measurements 2-5-6 Amplifiers 2-5-6 Frequency Dividers 2-5-6 Frequency Multipliers 2-5-6 DDS 2-5-6 Phase‐Frequency Detectors 2-5-6 Oscillators 2-5-6 Resonators 2-5-6 Double‐Balanced Mixer Chapter 3 Special Loops 3-1 Introduction 3-2 Direct Digital Synthesis Techniques 3-2-1 A First Look at Fractional N 3-2-2 Digital Waveform Synthesizers 3-2-3 Signal Quality 3-2-4 Future Prospects 3-3 Loops with Delay Line as Phase Comparators 3-4 Fractional Division N Synthesizers 3-4-1 Example Implementation 3-4-2 Some Special Past Patents for Fractional Division N Synthesizers References Bibliography FRACTIONAL DIVISION N READINGS Chapter 4 LOOP COMPONENTS 4-1 INTRODUCTION TO OSCILLATORS AND THEIR MATHEMATICAL TREATMENT 4-2 THE COLPITTS OSCILLATOR 4-2-1 Linear Approach 4-2-2 Design Example for a 350 MHz Fixed‐Frequency Colpitts Oscillator 4-2-3 Validation Circuits 4-2-4 Series Feedback Oscillator [5, Appendix A, pp. 384–388] 4-2-5 2400 MHz MOSFET‐Based Push–Pull Oscillator 4-2-6 Oscillators for IC Applications 4-2-7 Noise in Semiconductors and Circuits 4-2-8 Summary 4-3 USE OF TUNING DIODES 4-3-1 Diode Tuned Resonant Circuits 4-3-2 Practical Circuits 4-4 USE OF DIODE SWITCHES 4-4-1 Diode Switches for Electronic Band Selection 4-4-2 Use of Diodes for Frequency Multiplication 4-5 REFERENCE FREQUENCY STANDARDS 4-5-1 Specifying Oscillators 4-5-2 Typical Examples of Crystal Oscillator Specifications 4-6 MIXER APPLICATIONS 4-7 PHASE/FREQUENCY COMPARATORS 4-7-1 Diode Rings 4-7-2 Exclusive ORs 4-7-3 Sample/Hold Detectors 4-7-4 Edge‐Triggered JK Master/Slave Flip‐Flops 4-7-5 Digital Tri‐State Comparators 4-8 WIDEBAND HIGH‐GAIN AMPLIFIERS 4-8-1 Summation Amplifiers 4-8-2 Differential Limiters 4-8-3 Isolation Amplifiers 4-8-4 Example Implementations 4-9 PROGRAMMABLE DIVIDERS 4-9-1 Asynchronous Counters 4-9-2 Programmable Synchronous Up‐/Down‐Counters 4-9-3 Advanced Implementation Example 4-9-4 Swallow Counters/Dual‐Modulus Counters 4-9-5 Look‐Ahead and Delay Compensation 4-10 LOOP FILTERS 4-10-1 Passive RC Filters 4-10-2 Active RC Filters 4-10-3 Active Second‐Order Low‐Pass Filters 4-10-4 Passive LC Filters 4-10-5 Spur‐Suppression Techniques 4-11 MICROWAVE OSCILLATOR DESIGN 4-11-1 The Compressed Smith Chart 4-11-2 Series or Parallel Resonance 4-11-3 Two‐Port Oscillator Design 4-12 MICROWAVE RESONATORS 4-12-1 SAW Oscillators 4-12-2 Dielectric Resonators 4-12-3 YIG Oscillators 4-12-4 Varactor Resonators 4-12-5 Ceramic Resonators 4-12 REFERENCES 4-12 SUGGESTED READINGS 4-12-5 Section 4‐3 Documents 4-12-5 Section 4‐5 Documents 4-12-5 Section 4‐6 Documents 4-12-5 Section 4‐7 Documents 4-12-5 Section 4‐8 Documents 4-12-5 Section 4.9 Documents 4-12-5 Section 4.10 Documents 4-12-5 Section 4.11 Documents 4-12-5 Section 4.12 Documents Chapter 5 Digital PLL Synthesizers 5-1 Multiloop Synthesizers Using Different Techniques 5-1-1 Direct Frequency Synthesis 5-1-2 Multiple Loops 5-2 System Analysis 5-3 Low‐Noise Microwave Synthesizers 5-3-1 Building Blocks 5-3-2 Output Loop Response 5-3-3 Low Phase Noise References: Frequency Standards 5-3-4 Critical Stage 5-3-5 Time Domain Analysis 5-3-6 Summary 5-3-7 Two Commercial Synthesizer Examples 5-4 Microprocessor Applications in Synthesizers 5-5 Transceiver Applications 5-6 About Bits, Symbols, and Waveforms 5-6-1 Representation of a Modulated RF Carrier 5-6-2 Generation of the Modulated Carrier 5-6-3 Putting It all Together 5-6-4 Combination of Techniques 5-6 Acknowledgments 5-6 References 5-6 Bibliography and Suggested Reading Chapter 6 A High‐Performance Hybrid Synthesizer 6-1 Introduction 6-2 Basic Synthesizer Approach 6-3 Loop Filter Design 6-4 Summary Bibliography Chapter A Mathematical Review A-1 FUNCTIONS OF A COMPLEX VARIABLE A-2 COMPLEX PLANES A-2-1 Functions in the Complex Frequency Plane A-3 BODE DIAGRAM A-4 LAPLACE TRANSFORM A-4-1 The Step Function A-4-2 The Ramp A-4-3 Linearity Theorem A-4-4 Differentiation and Integration A-4-5 Initial Value Theorem A-4-6 Final Value Theorem A-4-7 The Active Integrator A-4-8 Locking Behavior of the PLL A-5 LOW‐NOISE OSCILLATOR DESIGN A-5-1 Example Implementation A-6 OSCILLATOR AMPLITUDE STABILIZATION A-7 VERY LOW PHASE NOISE VCO FOR 800 MHZ REFERENCES Chapter B A General‐Purpose Nonlinear Approach to the Computation of Sideband Phase Noise in Free‐Running Microwave and RF Oscillators B-1 Introduction B-2 Noise Generation in Oscillators B-3 Bias‐Dependent Noise Model B-3-1 Bias‐Dependent Model B-3-2 Derivation of the Model B-4 General Concept of Noisy Circuits B-4-1 Noise from Linear Elements B-5 Noise Figure of Mixer Circuits B-6 Oscillator Noise Analysis B-7 Limitations of the Frequency‐Conversion Approach B-7-1 Assumptions B-7-2 Conversion and Modulation Noise B-7-3 Properties of Modulation Noise B-7-4 Noise Analysis of Autonomous Circuits B-7-5 Conversion Noise Analysis Results B-7-6 Modulation Noise Analysis Results B-8 Summary of the Phase Noise Spectrum of the Oscillator B-9 Verification Examples for the Calculation of Phase Noise in Oscillators Using Nonlinear Techniques B-9-1 Example 1: High‐Q Case Microstrip DRO B-9-2 Example 2: 10 MHz Crystal Oscillator B-9-3 Example 3: The 1‐GHz Ceramic Resonator VCO B-9-4 Example 4: Low Phase Noise FET Oscillator B-9-5 Example 5: Millimeter‐Wave Applications B-9-6 Example 6: Discriminator Stabilized DRO B-10 Summary B-10 References Chapter C EXAMPLE OF WIRELESS SYNTHESIZERS USING COMMERCIAL ICs Chapter D MMIC‐BASED SYNTHESIZERS D-1 INTRODUCTION BIBLIOGRAPHY Chapter E ARTICLES ON DESIGN OF DIELECTRIC RESONATOR OSCILLATORS E-1 THE DESIGN OF AN ULTRA‐LOW PHASE NOISE DRO E-1-1 Basic Considerations and Component Selection E-1-2 Component Selection E-1-3 DRO Topologies E-1-4 Small Signal Design Approach for the Parallel Feedback Type DRO E-1-5 Simulated Versus Measured Results E-1-6 Physical Embodiment E-1-7 Acknowledgments E-1-8 Final Remarks REFERENCES BIBLIOGRAPHY E-2 A NOVEL OSCILLATOR DESIGN WITH METAMATERIAL‐MÖBIUS COUPLING TO A DIELECTRIC RESONATOR E-2-1 Abstract E-2-2 Introduction REFERENCES Chapter F OPTO‐ELECTRONICALLY STABILIZED RF OSCILLATORS F-1 INTRODUCTION F-1-1 Oscillator Basics F-1-2 Resonator Technologies F-1-3 Motivation for OEO F-1-4 Operation Principle of the OEO F-2 EXPERIMENTAL EVALUATION AND THERMAL STABILITY OF OEO F-2-1 Experimental Setup F-2-2 Phase Noise Measurements F-2-3 Thermal Sensitivity Analysis of Standard Fibers F-2-4 Temperature Sensitivity Measurements F-2-5 Temperature Sensitivity Improvement with HC‐PCF F-2-6 Improve Thermal Stability Versus Phase Noise Degradation F-2-7 Passive Temperature Compensation F-2-8 Improving Effective Q with Raman Amplification F-3 FORCED OSCILLATION TECHNIQUES OF OEO F-3-1 Analysis of Standard Injection‐Locked (IL) Oscillators F-3-2 Analysis of Self‐Injection Locked (SIL) Oscillators F-3-3 Experimental Verification of Self‐Injection Locked (SIL) Oscillators F-3-4 Analysis of Standard Phase Locked Loop (PLL) Oscillators F-3-5 Analysis of Self Phase Locked Loop (SPLL) Oscillators F-3-6 Experimental Verification of Self‐Phase Locked Loop (SPLL) Oscillators F-3-7 Analysis of Self‐Injection Locked Phase Locked Loop (SILPLL) Oscillators F-4 SILPLL BASED X‐ AND K‐BAND FREQUENCY SYNTHESIZERS F-4-1 X‐Band Frequency Synthesizer F-4-2 19″ Rack‐Mountable K‐Band Frequency Synthesizer F-5 INTEGRATED OEO REALIZATION USING Si‐PHOTONICS F-6 COMPACT OEO USING InP MULTI‐MODE SEMICONDUCTOR LASER F-6-1 Structure of Multi‐mode InP Laser F-6-2 Multi‐mode Laser and Inter‐Modal RF Oscillation F-6-3 Self‐Forced Frequency Stabilizations F-7 DISCUSSIONS F-7 ACKNOWLEDGMENTS References Chapter G Phase Noise Analysis, then and Today G-1 Introduction G-2 Large‐Signal Noise Analysis References Chapter H A Novel Approach to Frequency and Phase Settling Time Measurements on PLL Circuits H-1 Introduction1 H-2 Settling Time Measurement Overview H-2-1 Theoretical Background of Frequency Settling Time H-2-2 Frequency Settling Measurement in the Past H-3 R&S FSWP Phase Noise Analyzer H-3-1 Phase Noise Analyzer Architecture H-3-2 Typical Test Setup for Settling Time Measurements H-4 Frequency Hopping and Settling Time Measurements in Practice H-4-1 Trigger on Wideband Frequency Hopping Signals H-4-2 Frequency and Phase Settling Time Measurement H-5 Conclusion Index EULA