ENGLISH

Architecting and Building High-Speed SoCs. Design, develop, and debug complex FPGA-based systems-on-chip

Book information

Publisher
Packt Publishing
Year
2022
ISBN
9781801810999, 1801810990
ASIN
B0BF51NTV7
Google Books ID
xo6cEAAAQBAJ
Language
english
Format
PDF
Filesize
39 MB (40572613 bytes)
Edition
1
Pages
426\426
Orientation
portrait
Scanned
no
Time added
2024-05-03 04:23:25

Description

Design a high-speed SoC while gaining a holistic view of the FPGA design flow and overcoming its challenges. Modern and complex SoCs can adapt to many demanding system requirements by combining the processing power of ARM processors and the feature-rich Xilinx FPGAs. You'll need to understand many protocols, use a variety of internal and external interfaces, pinpoint the bottlenecks, and define the architecture of an SoC in an FPGA to produce a superior solution in a timely and cost-efficient manner. This book adopts a practical approach to helping you master both the hardware and software design flows, understand key interconnects and interfaces, analyze the system performance and enhance it using the acceleration techniques, and finally build an RTOS-based software application for an advanced SoC design. You'll start with an introduction to the FPGA SoCs technology fundamentals and their associated development design tools. Gradually, the book will guide you through building the SoC hardware and software, starting from the architecture definition to testing on a demo board or a virtual platform. The level of complexity evolves as the book progresses and covers advanced applications such as communications, security, and coherent hardware acceleration. By the end of this book, you'll have learned the concepts underlying FPGA SoCs' advanced features and you'll have constructed a high-speed SoC targeting a high-end FPGA from the ground up. Key Features: - Use development tools to implement and verify an SoC, including ARM CPUs and the FPGA logic - Overcome the challenge of time to market by using FPGA SoCs and avoid the prohibitive ASIC NRE cost - Understand the integration of custom logic accelerators and the SoC software and build them What You Will Learn: - Understand SoC FPGAs' main features, advanced buses and interface protocols - Develop and verify an SoC hardware platform targeting an FPGA-based SoC - Explore and use the main tools for building the SoC hardware and software - Build advanced SoCs using hardware acceleration with custom IPs - Implement an OS-based software application targeting an FPGA-based SoC - Understand the hardware and software integration techniques for SoC FPGAs - Use tools to co-debug the SoC software and hardware - Gain insights into communication and DSP principles in FPGA-based SoCs Who this book is for: This book is for FPGA and ASIC hardware and firmware developers, IoT engineers, SoC architects, and anyone interested in understanding the process of developing a complex SoC, including all aspects of the hardware design and the associated firmware design. Prior knowledge of digital electronics, and some experience of coding in VHDL or Verilog and C or a similar language suitable for embedded systems will be required for using this book. A general understanding of FPGA and CPU architecture will also be helpful but not mandatory. About the Author Mounir Maaref lives in the UK and works as a Principal SoC Architect. He has 25 years' experience in the microelectronics industry spanning FPGAs, ASICs, embedded processing, networking, data storage, satellite communications, Bluetooth, and WiFi connectivity. He likes working on cutting edge technologies involving both hardware and soft ware. His main focus is on the system architecture design, hardware and software interactions, performance analysis, and modeling. He has published several application notes and white papers and has been a speaker at many conferences worldwide. He holds a masters degree in Electronics and Telecoms. He is a 2nd dan black belt in Tang Soo Do and is getting trained to become a martial arts instructor.

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