ENGLISH

Fault Tolerant Computer Architecture

Book information

Publisher
Morgan and Claypool Publishers
Year
2009
ISBN
1598299530, 9781598299533
DOI
10.2200/S00192ED1V01Y200904CAC005
ISSN
1935-3235
Language
english
Format
PDF
Filesize
1 MB (1437821 bytes)
Series
Synthesis Lectures on Computer Architecture
Pages
104\117
Orientation
yes
Scanned
no
Time added
2011-08-31 04:54:40

Description

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

Similar books