Digital Design: A Systems Approach

Description

Cover......Page 1 Table of Contents......Page 5 Preface......Page 10 Part I: Introduction......Page 13 Chapter 1: The Digital Abstraction......Page 14 Exercises......Page 21 Chapter 2: The Practice of Digital System Design......Page 23 Exercises......Page 31 Part II: Combination Logic......Page 32 Chapter 3: Boolean Algebra......Page 33 Exercises......Page 39 Chapter 4: CMOS Logic Circuits......Page 40 Exercises......Page 51 Chapter 5: Delay and Power of CMOS Circuits......Page 52 Exercises......Page 62 Chapter 6: Combinational Logic Design......Page 64 Exercises......Page 74 Chapter 7: Verilog Descriptions of Combinational Logic......Page 77 Exercises......Page 86 Chapter 8: Combinational Building Blocks......Page 88 Exercises......Page 105 Chapter 9: Combinational Examples......Page 106 Exercises......Page 114 Part III: Arithmetic Circuits......Page 115 Chapter 10: Arithmetic Circuits......Page 116 Exercises......Page 128 Chapter 11: Fixed- and Floating-point Numbers......Page 131 Exercises......Page 138 Chapter 12: Fast Arithmetic Circuits......Page 140 Exercises......Page 149 Chapter 13: Arithmetic Examples......Page 150 Exercises......Page 155 Part IV: Synchronous Sequential Logic......Page 157 Chapter 14: Sequential Logic......Page 158 Exercises......Page 168 Chapter 15: Timing Constraints......Page 170 Exercises......Page 176 Chapter 16: Datapath Sequential Logic......Page 178 Exercises......Page 191 Chapter 17: Factoring Finite-State Machines......Page 193 Exercises......Page 202 Chapter 18: Microcode......Page 204 Exercises......Page 218 Chapter 19: Sequential Examples......Page 220 Exercises......Page 228 Part V: Practical Design......Page 229 Chapter 20: Verification and Test......Page 230 Exercises......Page 235 Part VI: System Design......Page 236 Chapter 21: System-Level Design......Page 237 Chapter 22: Interface and System-Level Timing......Page 243 Exercises......Page 251 Chapter 23: Pipelines......Page 252 Exercises......Page 263 Chapter 24: Interconnect......Page 265 Exercises......Page 269 Chapter 25: Memory Systems......Page 270 Exercises......Page 277 Part VII: Asynchronous Logic......Page 278 Chapter 26: Aynchronous Sequential Circuits......Page 279 Exercises......Page 285 Chapter 27: Flip-Flops......Page 287 Exercises......Page 292 Chapter 28: Metastability and Synchronization Failure......Page 294 Exercises......Page 300 Chapter 29: Synchronizer Design......Page 301 Exercises......Page 307 Appendix: Verilog Coding Style......Page 309 References......Page 315 Index of Verilog Modules......Page 317 Subject Index......Page 318