ENGLISH

Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

By Sunil P. Khatri , Ayan Mandal , Rabi Mahapatra

Book information

Publisher
Springer
Year
2014
ISBN
1461494044, 9781461494041
Language
english
Format
PDF
Filesize
3 MB (3364321 bytes)
Pages
160\151
Time added
2014-05-16 16:09:21

Description

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Similar books