Digital system design with SystemVerilog

Description

The Definitive, Up-to-Date Guide to Digital Design with SystemVerilog: Concepts, Techniques, and CodeTo design state-of-the-art digital hardware, engineers first specify functionality in a high-level Hardware Description Language (HDL)--and today's most powerful, useful HDL is SystemVerilog, now an IEEE standard. "Digital System Design with SystemVerilog" is the first comprehensive introduction to both SystemVerilog and the contemporary digital hardware design techniques used with it.Building on the proven approach of his bestselling "Digital System Design with VHDL," Mark Zwolinski covers everything engineers need to know to automate the entire design process with SystemVerilog--from modeling through functional simulation, synthesis, timing simulation, and verification. Zwolinski teaches through about a hundred and fifty practical examples, each with carefully detailed syntax and enough in-depth information to enable rapid hardware design and verification. All examples are available for download from the book's companion Web site, zwolinski.org.Coverage includesUsing electronic design automation tools with programmable logic and ASIC technologiesEssential principles of Boolean algebra and combinational logic design, with discussions of timing and hazardsCore modeling techniques: combinational building blocks, buffers, decoders, encoders, multiplexers, adders, and parity checkersSequential building blocks: latches, flip- flops, registers, counters, memory, and sequential multipliersDesigning finite state machines: from ASM chart to D flip-flops, next state, and output logicModeling interfaces and packages with SystemVerilogDesigning testbenches: architecture, constrained random test generation, and assertion-based verificationDescribing RTL and FPGA synthesis modelsUnderstanding and implementing Design-for-TestExploring anomalous behavior in asynchronous sequential circuitsPerforming Verilog-AMS and mixed-signal modelingWhatever your experience with digital design, older versions of Verilog, or VHDL, this book will help you discover SystemVerilog's full power and use it to the fullest.