ENGLISH

Advanced Interconnects for ULSI Technology

Book information

Year
2012
ISBN
9780470662540, 9781119963677
DOI
10.1002/9781119963677
Language
english
Format
PDF
Filesize
9 MB (9105919 bytes)
Pages
597\597
Orientation
yes
Scanned
yes
Time added
2013-08-01 04:00:00

Description

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses:Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical  properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.Content: Chapter 1 Low?k Materials: Recent Advances (pages 1–33): Geraud Dubois and Willi VolksenChapter 2 Ultra?Low?k by CVD: Deposition and Curing (pages 35–77): Vincent Jousseaume, Aziz Zenasni, Olivier Gourhant, Laurent Favennec and Mikhail R. BaklanovChapter 3 Plasma Processing of Low?k Dielectrics (pages 79–128): Hualiang Shi, Denis Shamiryan, Jean?Francois de Marneffe, Huai Huang, Paul S. Ho and Mikhail R. BaklanovChapter 4 Wet Clean Applications in Porous Low?k Patterning Processes (pages 129–171): Quoc Toan Le, Guy Vereecke, Herbert Struyf, Els Kesters and Mikhail R. BaklanovChapter 5 Copper Electroplating for On?Chip Metallization (pages 173–191): Valery M. DubinChapter 6 Diffusion Barriers (pages 193–234): Michael Hecker and Rene HubnerChapter 7 Process Integration of Interconnects (pages 235–265): Sridhar Balakrishnan, Ruth Brain and Larry ZhaoChapter 8 Chemical Mechanical Planarization for Cu–Low?k Integration (pages 267–289): Gautam BanerjeeChapter 9 Scaling and Microstructure Effects on Electromigration Reliability for Cu Interconnects (pages 291–337): Chao?Kun Hu, Rene Hubner, Lijuan Zhang, Meike Hauschildt and Paul S. HoChapter 10 Mechanical Reliability of Low?k Dielectrics (pages 339–367): Kris Vanstreels, Han Li and Joost J. VlassakChapter 11 Electrical Breakdown in Advanced Interconnect Dielectrics (pages 369–434): Ennis T. Ogawa and Oliver AubelChapter 12 3D Interconnect Technology (pages 435–490): John U. Knickerbocker, Lay Wai Kong, Sven Niese, Alain Diebold and Ehrenfried ZschechChapter 13 Carbon Nanotubes for Interconnects (pages 491–502): Mizuhisa Nihei, Motonobu Sato, Akio Kawabata, Shintaro Sato and Yuji AwanoChapter 14 Optical Interconnects (pages 503–542): Wim BogaertsChapter 15 Wireless Interchip Interconnects (pages 543–563): Takamaro Kikkawa

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