ENGLISH

Applied Formal Verification: For Digital Circuit Design

By Douglas Perry , Harry Foster

Book information

Publisher
McGraw-Hill Professional
Year
2005
ISBN
007144372X
DOI
10.1036/007144372X
Open Library ID
OL7300700M
Language
english
Format
PDF
Filesize
1 MB (1270200 bytes)
Edition
1
Pages
259\259
Library
mexmat
Time added
2009-07-20 03:45:11

Description

Intended for hardware design engineers, this book introduces general verification techniques, compares them with formal verification techniques, and provides instructions for creating formal high level requirement. The authors discuss formal verification concepts for both applied Boolean and sequential verification, formal property checking, the process of creating a formal test plan, and state reduction techniques. The appendices list commonly used PSL statements for high level requirements and similar requirements specified in System Verilog syntax.

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