ENGLISH

Multigate Transistors for High Frequency Applications

Book information

Publisher
Springer
Year
2023
ISBN
9819901561, 9789819901562
Language
english
Format
PDF
Filesize
4 MB (4181424 bytes)
Series
Springer Tracts in Electrical and Electronics Engineering
Pages
102\98
Time added
2023-04-02 23:43:33

Description

This book discusses the evolution of multigate transistors, the design challenges of transistors for high-frequency applications, and the design and modeling of multigate transistors for high-frequency applications. The contents particularly focus on the cut-off frequency and maximum oscillation frequency of different multigate structures. RF stability modeling for multigate transistors is presented, which can help to understand the relation between the small-signal parameter and the physical parameter of the device for optimization. This is a useful reference to those in academia and industry. Preface Contents About the Authors 1 Introduction 1.1 Impact of Scaling 1.2 Heterogeneous Integration of Digital and Non-Digital Functionalities 1.3 Evolution of Multigate Transistors 1.4 Roadmap of Semiconductor Devices for High-Frequency Applications References 2 Radio Frequency Transistor Stability and Design Challenges 2.1 Introduction 2.2 RF Transistors—Figures of Merit (FoM) 2.2.1 Stability 2.2.2 Cut-Off Frequency (ft) 2.2.3 Maximum Oscillation Frequency (fmax) 2.3 RF Transistor Stability 2.3.1 Transistor Stability 2.3.2 Stability Circles 2.3.3 Tests for Unconditional Stability 2.4 Design Challenges of Transistors for RF Applications 2.4.1 Issues Associated with RF FoM 2.4.2 RF Modeling and Characterization 2.4.3 Critical RF Building Blocks 2.5 Summary References 3 Radio Frequency Stability Performance of DG MOSFET 3.1 Introduction 3.2 Numerical Modeling of DG MOSFET 3.3 Stability Factor Modeling 3.4 Bias Optimization of DG MOSFET: RF Stability Perspective 3.4.1 Optimization of Gate to Source Voltage 3.4.2 Optimization of Drain to Source Voltage 3.5 Geometry Optimization of DG MOSFET: RF Stability Perspective 3.5.1 Optimization of Gate Spacer Length 3.5.2 Optimization of Silicon Body Thickness 3.6 Optimized Double-Gate MOSFET for Improved RF Stability Performance 3.7 Summary References 4 Radio Frequency Stability Performance of Double-Gate Tunnel FET 4.1 Introduction 4.2 Numerical Modeling of DG Tunnel FET 4.3 Small-Signal Modelling of DG Tunnel FET 4.4 RF Stability Performance of Double-Gate Tunnel FET 4.5 Impact of Process Variation on RF Stability Performance of DG Tunnel FET 4.5.1 Impact of Body Thickness Variation 4.5.2 Impact of Oxide Thickness Variation 4.5.3 Impact of Gate Contact Alignment 4.5.4 Impact of Doping Concentration 4.6 Summary References 5 Radio Frequency Stability Performance of FinFET 5.1 Introduction 5.2 Numerical Modeling of FinFET 5.3 Stability Modeling 5.4 Bias Optimization of FinFET: RF Stability Perspective 5.4.1 Optimization of Gate to Source Voltage 5.4.2 Optimization of Drain to Source Voltage 5.5 Geometry Optimization of FinFET: RF Stability Perspective 5.5.1 Optimization of Gate Spacer Length 5.5.2 Optimization of Fin Height and Fin Thickness 5.6 Optimization of Gate Work Function—RF Stability Perspective 5.7 Optimized FinFET Structure for Improved RF Stability Performance 5.8 Summary References 6 Radio Frequency Stability Performance of Silicon Nanowire Transistor 6.1 Introduction 6.2 Numerical Modeling of Silicon Nanowire Transistor 6.3 Stability Modeling 6.4 Bias Optimization of SNWT—RF Stability Perspective 6.4.1 Optimization of Gate to Source Voltage 6.4.2 Optimization of Drain to Source Voltage 6.5 Geometry Optimization of SNWT—RF Stability Perspective 6.5.1 Optimization of Gate Contact Alignment 6.5.2 Optimization of Silicon Radius 6.6 Optimized SNWT for Improved RF Stability Performance 6.7 Summary References 7 Radio Frequency Stability Performance of SELBOX Inverted-T Junctionless FET 7.1 Introduction 7.2 Virtual Fabrication Process Flow 7.3 Numerical Modeling of SELBOX ITJLFET 7.4 Stability Modeling 7.5 Impact of the Geometrical Parameter Variation on the RF Stability Performance 7.5.1 Impact of Supply Voltages 7.5.2 Impact of Gate Length (LG) 7.5.3 Impact of SELBOX Length (LSELBOX) 7.5.4 Impact of Source Underlap Length (LUS) 7.5.5 Impact of Fin Height (Hfin) 7.5.6 Impact of Fin Width (Wfin) 7.5.7 Impact of Gate Work Function (φms) 7.6 Summary References

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