ENGLISH

Low-Power Variation-Tolerant Design in Nanometer Silicon

By Bhunia , Swarup(Editor)

Book information

Publisher
Springer
ISBN
9781441974174, 9781441974181, 1441974172, 1441974180
Language
english
Format
PDF
Filesize
9 MB (9026885 bytes)
Pages
XV, 440 Seiten: Illustrationen, Diagramme; 235 x 1
Time added
2020-11-29 04:20:31

Description

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.

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