x86 Instruction Set Architecture

Description

The Instruction Set Architecture, or ISA, is defined as that part of the processor architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external IO. With the exception of some small deviations and differences in terminology, all Intel and AMD x86 processors share a common ISA. This book focuses on those shared attributes (it does not cover those areas where the two companies have chosen widely divergent solutions which, by definition, fall outside of the ISA specification). If you re looking for a comprehensive book designed to bootstrap you up quickly on virtually all aspects of the x86 32/64-bit Instruction Set Architecture (ISA), we respectfully ask you to consider this book.Essential topics covered include: Basic Terms and ConceptsOperating Mode/SubMode IntroductionA (very) Brief HistoryState After ResetIntro to the IA-32 EcosystemInstruction Set Expansion32-bit Machine Language Instruction FormatReal Mode (8086 Emulation)Legacy x87 FP SupportIntroduction to MultitaskingMultitasking-Related IssuesSummary of the Protection MechanismsProtected Mode Memory AddressingCode, Calls and Privilege ChecksData and Stack SegmentsIA-32 Address Translation MechanismsMemory Type ConfigurationTask SwitchingProtected Mode Interrupts and ExceptionsVirtual 8086 ModeThe MMX FacilitiesThe SSE FacilitiesIA-32e OS EnvironmentIA-32e Address TranslationCompatibility Mode64-bit Register Overview64-bit Operands and Addressing64-bit Machine Language Instruction Format64-bit Odds and EndsTransitioning to Protected ModeTransitioning to IA-32e ModeIntroduction to Virtualization TechnologySystem Management Mode (SMM)Machine Check Architecture (MCA)The Local and IO APICs