UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

Description

This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. Front Matter....Pages i-xviii Front Matter....Pages 1-1 Introduction....Pages 3-7 The LEON3 Processor....Pages 9-14 Microthreaded Extensions....Pages 15-43 The Basic UTLEON3 Architecture....Pages 45-66 UTLEON3 Programming by Example....Pages 67-77 Front Matter....Pages 79-79 UTLEON3 Implementation Details....Pages 81-109 Execution Efficiency of the Microthreaded Pipeline....Pages 111-126 Hardware Families of Threads....Pages 127-158 I/O and Interrupt Handling in the Microthreaded Mode....Pages 159-172 Back Matter....Pages 173-219