ENGLISH

Design verification with e

By Samir , Palnitkar

Book information

Publisher
Prentice Hall PTR
ISBN
0131413090, 9780131413092
Language
english
Format
PDF
Filesize
3 MB (2818434 bytes)
Series
Prentice Hall modern semiconductor design series
Pages
xl, 363 pages: illustrations; 25 cm\410
Time added
2020-11-29 04:30:10

Description

An improvement upon Verilog and VHDL, e gives engineers the speed and efficiency to improve the quality of design verification. The text offers examples and exercises as well as a fully functional demo.

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