Digital Communications Test & Measurement

Description

Cover Contents Preface About the Authors Acknowledgments Chapter 1 Fundamentals of Digital Communications Systems 1.1 Introduction 1.2 System Architectures 1.2.1 Synchronous Systems 1.2.2 Source Synchronous Systems 1.2.3 Source Synchronous Systems with Double Data Rate 1.2.4 Forwarded Clock Systems 1.2.5 Embedded Clock Serial Systems 1.2.6 Spread Spectrum Clocking 1.3 Line Coding of Digital Signals 1.3.1 Properties of Binary Data 1.3.2 Binary Line Codes 1.3.3 Multilevel Line Codes 1.3.4 Block Codes 1.4 Electrical Signaling 1.4.1 Single-Ended Signaling 1.4.2 Differential Signaling 1.4.3 Preemphasis and Receiver Equalization 1.5 Summary 1.6 References 1.6.1 General References 1.6.2 Digital Design 1.6.3 Line Coding 1.6.4 Forward Error Correction 1.6.5 Equalization and Preemphasis Chapter 2 Jitter Basics 2.1 Definition of Jitter 2.1.1 Phase Noise and Phase Jitter 2.1.2 Period Jitter and Cycle-to-Cycle Jitter 2.1.3 Jitter versus Wander 2.2 Jitter as a Statistical Phenomenon 2.2.1 Jitter Time Waveform 2.2.2 Jitter Frequency Spectrum 2.2.3 Jitter Statistics 2.3 Total Jitter and Its Subcomponents 2.3.1 Jitter Mechanisms 2.3.2 Classification Schemes 2.4 Analytical Solutions for Jitter Mixtures 2.4.1 Basic Jitter Types 2.4.2 Understanding Convolution 2.4.3 Mix of Random Jitter and Periodic Jitter 2.4.4 Mix of Random Jitter and Nonperiodic Jitter 2.5 The Dual Dirac Model 2.5.1 Introduction 2.5.2 The Q Scale 2.5.3 The Dual Dirac Model in Principle 2.5.4 The Dual Dirac Model in Practice 2.6 Summary 2.7 References Chapter 3 Serial Communication Systems and Modulation Codes 3.1 Introduction 3.1.1 Factors That Influence Communication Protocol and Hardware Choices 3.1.2 Advantages of Serialization and Encoding 3.1.3 Communication Protocol Details 3.2 Encoders and Modulation Code Examples 3.2.1 Manchester Encoding 3.2.2 4B5B Block Substitution Encoding 3.2.3 8B10B Block Substitution Encoding 3.2.4 SONET Telecommunication System Encoding 3.2.5 Statistical Characteristics of Scrambler Encoders 3.2.6 Other Reasons for Encoding the Serial Data 3.2.7 Exceptions to Encoding Rules 3.2.8 Encoder Efficiency 3.3 Telephone System History and Evolution 3.3.1 Coping with the Need for Improved Service 3.3.2 The Analog-to-Digital Transformation 3.3.3 Digital Carrier Transmission Systems 3.3.4 The Plesiochronous Digital Hierarchy 3.3.5 Encoding Rules for T-Carrier (T1) Transmission Systems 3.3.6 Encoding Rules for E1 Carrier Transmission Systems 3.3.7 The Synchronous Optical Network 3.3.8 The Architecture of SONET Frames 3.3.9 SONET Clock Architecture 3.4 SONET Design Requirements 3.4.1 SONET Capacitive Coupling Networks 3.4.2 SONET Laser Driver Requirements 3.5 Measuring the Band-Pass Response 3.6 Jitter 3.6.1 Power Supply Noise: A Commonly Overlooked Source of Jitter 3.6.2 Jitter Contribution of the SERDES Chip’s Reference Clock and PLL 3.7 Measuring Power Supply Noise Immunity 3.8 Power Supply Distribution, Grounding, and Shielding 3.9 Measuring SONET Jitter 3.9.1 SONET/SDH Jitter Measurement Methods 3.9.2 Jitter Transfer 3.9.3 Jitter Tolerance 3.9.4 Jitter Generation 3.9.5 SONET Jitter Test Systems 3.9.6 Limitations of the SONET Jitter Methodology 3.9.7 An Example of Jitter Transfer Measurement 3.9.8 An Example of Jitter Tolerance Measurement 3.9.9 Deterministic Jitter and Periodic Jitter Measurement Techniques 3.9.10 SONET Jitter Summary 3.9.11 Other Data Communication Jitter Measurement Standards and Methods 3.10 Modulation Codes for the Last Mile 3.10.1 The Evolution of the Integrated Services Digital Network 3.10.2 Modulation Codes for Digital Subscriber Loop Systems 3.10.3 DSL and ADSL Summary 3.10.4 Fiber-to-the-Home 3.11 Gigabit Ethernet 3.11.1 The XGMII Interface 3.11.2 The XAUI Bus Extender for XGMII 3.11.3 XAUI Summary 3.11.4 The 64B66B Encoder 3.12 Summary 3.13 References Chapter 4 Bit Error Ratio Testing 4.1 Basics of Bit Error Ratio Testing 4.1.1 Definitions 4.1.2 Test Setup 4.1.3 Test Pattern Selection 4.1.4 BERT Receiver Setup and Sample Point Adjustment 4.1.5 Synchronization 4.1.6 Target Bit Error Ratio 4.2 Bit Error Ratio Statistics 4.2.1 Bit Error Ratio as a Function of Time 4.2.2 BER Measurement as a Binomial Process 4.2.3 Possible BER Measurement Outcomes If the BER Is Known 4.2.4 Confidence Intervals on Bit Error Ratio Measurements 4.2.5 Lower and Upper Limits on BER 4.3 Advanced BER Measurement Topics 4.3.1 Postprocessing of Captured Data 4.3.2 Accelerated BER Measurements 4.3.3 System Bit Error Ratio from Components 4.4 Summary 4.5 References Chapter 5 BERT Scan Measurements 5.1 Basics of BERT Scan Measurements 5.2 Sample Delay Scan 5.2.1 Graphical Representation 5.2.2 Examples 5.2.3 Numerical Results 5.2.4 Measurement Procedure and Optimizations 5.2.5 Pathological Bathtub Cases 5.3 Sample Threshold Scan 5.3.1 Graphical Representation 5.3.2 Numerical Results 5.4 Full Eye Scan 5.4.1 Graphical Representation 5.4.2 Calculated Values 5.4.3 Optimizations 5.5 Spectral Jitter Decomposition 5.5.1 Theory of Operation 5.5.2 Graphical Representation 5.5.3 Calculated Values 5.6 Summary 5.7 References Chapter 6 Waveform Analysis—Real-Time Scopes 6.1 Principles of Operation of Real-Time Digital Oscilloscopes 6.1.1 Instrument Architecture 6.1.2 Sources of Inaccuracy 6.2 Eye Diagram Analysis on Real-Time Instruments 6.2.1 Eye Diagram Overview 6.2.2 Eye Diagram Construction in the Real-Time Oscilloscope 6.2.3 Other Methods for Eye Diagram Construction 6.2.4 Eye Diagram Measurements 6.2.5 Mask Testing 6.2.6 Other Eye Diagram Considerations 6.2.7 Summary of Eye Diagram Analysis 6.3 Methods of Analyzing Individual Jitter Components 6.3.1 Random Jitter 6.3.2 Data-Dependent and Duty Cycle Jitter 6.3.3 Periodic Jitter 6.4 Analysis of Composite Jitter 6.5 Measurement Procedures 6.5.1 Oscilloscope Equipment Check 6.5.2 Probing 6.5.3 Automatically Configured Measurements 6.5.4 Manually Configured Measurements 6.6 Interpreting Jitter Measurement Results 6.6.1 Predicting Behavior via a Reference Model 6.6.2 RJ/DJ Models 6.6.3 Graphical Analysis Tools 6.7 Summary 6.8 References Chapter 7 Characterizing High-Speed Digital Communications Signals and Systems with the Equivalent-Time Sampling Oscilloscope 7.1 Sampling Oscilloscope Basics 7.2 Triggering the Oscilloscope 7.3 Oscilloscope Bandwidth and Sample Rate 7.3.1 Achieving Wide Measurement Bandwidth with Sampling Oscilloscopes 7.3.2 The Wide Bandwidth Sampler 7.4 Waveform Acquisition Process for the Sampling Oscilloscope 7.4.1 Construction of the Pattern Waveform 7.4.2 Construction of the Eye Diagram 7.4.3 Jitter and Noise Reduction through Trace Averaging 7.5 Sources of Instrumentation Noise 7.6 Parametric Analysis of Waveforms 7.7 The Effect of Oscilloscope Bandwidth on Waveform Results 7.8 Measurements of the Eye Diagram 7.8.1 Extracting Signal Quality Information from the Eye Diagram 7.8.2 Eye Mask Testing 7.8.3 Laser Transmitter Extinction Ratio 7.8.4 Optical Modulation Amplitude 7.8.5 Golden PLL Triggering for Transmitter Testing 7.9 Return-to-Zero Signals 7.10 Advanced Jitter Analysis 7.10.1 The Case for Jitter Separation 7.10.2 The Different Components of Jitter 7.10.3 Jitter Analysis Solutions for Very High Data Rates 7.10.4 Limitations of the Common Sampling Oscilloscope 7.10.5 Architectural Changes Yield Fast and Accurate Measurements 7.10.6 Increasing Measurement Speed through Optimized Sampling 7.10.7 Making Jitter Measurements with the Improved Sampling Oscilloscope 7.10.8 Correlated Jitter 7.10.9 Uncorrelated Jitter 7.10.10 Aggregate Deterministic Jitter 7.10.11 Aggregate Total Jitter 7.10.12 Interpreting the Results of Jitter Separation 7.10.13 The Effect of Recovered Clock Triggers on Jitter Analysis 7.10.14 Residual Jitter of the Oscilloscope 7.11 Summary 7.12 References Chapter 8 High-Speed Waveform Analysis Using All-Optical Sampling 8.1 Introduction 8.1.1 Electronic versus Optical Sampling 8.1.2 Optical Waveform Measurement Techniques 8.1.3 Optical Waveform Sampling 8.1.4 Optical Sampling Demonstrations 8.2 Principles of Optical Sampling 8.2.1 Second-Order Nonlinearity-Based Sampling 8.2.2 Third-Order Nonlinearity-Based Sampling 8.2.3 Linear Optical Sampling 8.3 Performance Measures of All-Optical Sampling Systems 8.3.1 Performance Aspects of Different Sampling Gate Implementations 8.3.2 Performance Analysis of a Fiber FWM-Based Sampling System 8.3.3 Techniques for Polarization-Independent Sampling 8.3.4 Timing Jitter 8.3.5 All-Optical Sampling System Performance Comparison 8.4 Timebase Designs 8.4.1 Asynchronous Sampling 8.4.2 Equivalent-Time Sampling Using Hardware Synchronization 8.4.3 Equivalent-Time Sampling Using a Software-Algorithm-Based Timebase 8.5 Experimental Implementation and Key Building Blocks 8.5.1 Sampling Pulse Sources 8.5.2 Analog-to-Digital Conversion of Acquired Samples 8.5.3 Selection of Experimental Implementations of All-Optical Sampling 8.6 Related Applications and Possible Future Directions 8.6.1 Optical Intensity and Phase-Resolved Sampling 8.6.2 Time-Resolved State-of-Polarization Sampling 8.6.3 Possible Future Directions 8.7 Summary 8.8 References Chapter 9 Clock Synthesis, Phase Locked Loops, and Clock Recovery 9.1 Oscillators and Phase Noise 9.1.1 Tuned Circuit Oscillators 9.1.2 Delay Line Oscillators 9.2 Phase Locked Loops and Clock Synthesis 9.3 Clock Data Recovery Circuits 9.3.1 Analog Phase Detection 9.3.2 Digital Phase Detectors 9.4 PLL and Clock Recovery Dynamic Behavior 9.4.1 The Jitter Transfer and Observed Jitter Transfer Functions 9.4.2 Phase Locked Loop Order and Type 9.4.3 Second-Order PLLs 9.4.4 Type 2 Third-Order PLLs 9.4.5 Clock Recovery PLLs 9.4.6 Jitter Spectrum and PLL Multipliers 9.5 Measuring PLL Dynamics 9.5.1 Step Response 9.5.2 Stepped Sinusoidal 9.6 Measuring Phase Noise and Jitter Spectrum 9.6.1 Phase Noise versus Jitter Spectrum 9.6.2 Spectrum Analyzers 9.6.3 Phase Noise Systems and Signal Source Analyzers 9.6.4 Clock Recovery Phase Error Measurement 9.6.5 Oscilloscopes 9.6.6 Time Interval Analyzers 9.6.7 Specifying Jitter in Frequency or Time 9.7 Summary 9.8 References Chapter 10 Jitter Tolerance Testing 10.1 Introduction 10.1.1 Receiver Details 10.1.2 System Example 10.2 Jitter Tolerance: Basic Measurement Method and Test Setup 10.2.1 Loopback Test 10.2.2 Access Point for Checking Received Bits 10.3 Generation of Jitter Tolerance Test Signals 10.3.1 Test Patterns 10.3.2 Clock Modulation Circuits 10.3.3 Delay Modulation 10.3.4 Sinusoidal Jitter and Voltage Modulation Source 10.3.5 Random Jitter and Voltage Modulation Sources 10.3.6 Data-Correlated Jitter 10.3.7 Sinusoidal Amplitude Interference 10.3.8 Calibration 10.4 Jitter Tolerance Measurement Method and Test Setup 10.4.1 Automation of RX Jitter Tolerance Test 10.4.2 Calibrated Dials 10.4.3 Characterization 10.4.4 Compliance Test 10.4.5 Alternative Measurement Methods 10.5 Summary 10.6 References Chapter 11 Sensitivity Testing in Optical Digital Communications 11.1 Introduction: Optical Digital Receivers 11.2 The Basics of Optical Sensitivity Measurements 11.2.1 Sensitivity Defined 11.2.2 The Straight-Line Transformation for Sensitivity Plots 11.2.3 Dealing with Statistical Fluctuations 11.3 BER Calculations in Real Communications Systems 11.3.1 BER Measurements in SONET/SDH 11.3.2 BER Measurements in Ethernet 11.4 Summary 11.5 References Chapter 12 Stress Tests in High-Speed Serial Links 12.1 The Need for High-Speed Serial Communication 12.2 Early High-Speed Optical Stressed-Eye Tests 12.3 BER versus OSNR 12.3.1 Measuring OSNR 12.3.2 Expected Receiver Performance with Degraded OSNR 12.3.3 BER versus OSNR: Experimental Results 12.4 10 Gigabit Ethernet: IEEE 802.3ae 12.4.1 OMA versus Average Power 12.4.2 Degradations Defined in IEEE 802.3ae 12.4.3 IEEE 802.3ae Summary 12.5 The Advent of Electronic Dispersion Compensation 12.5.1 Dispersion, ISI, and EDCs 12.6 LRM Stress Testing (IEEE 802.3aq) 12.6.1 TWDP Evaluation 12.7 Future Standards 12.7.1 SFP+ for Linear Modules 12.7.2 High-Speed Serial Backplanes 12.8 Summary 12.9 References Chapter 13 Measurements on Interconnects 13.1 Measurements and Characterization of Interconnects 13.1.1 Electrical Characteristics of Interconnects 13.1.2 Basics of TDR/T Measurements 13.1.3 True Impedance Profiles 13.1.4 Frequency Domain Characterization 13.2 Modeling of System Performance from Measurements 13.2.1 SPICE Modeling of Passive Interconnects 13.2.2 S-Parameter Prediction from a SPICE Model Example 13.2.3 A Backplane Modeling Example 13.3 Summary 13.4 References Chapter 14 Frequency Domain Measurements 14.1 Introduction 14.1.1 Time Domain versus Frequency Domain 14.1.2 Frequency Domain Analysis 14.2 Understanding Network Analyzer Hardware 14.2.1 Network Analyzer Architectures 14.2.2 Measuring Receivers 14.2.3 The Measurement Process 14.3 Understanding S-Parameters 14.3.1 General S-Parameters 14.3.2 Two-Port Devices 14.3.3 Four-Port Devices 14.3.4 Moving Beyond Simple Reflection and Transmission Coefficients 14.4 Error Correction and Calibration Methods 14.4.1 Measurement Errors 14.4.2 Computing the Actual Device Response 14.4.3 Calibration Options 14.5 Graphical Representations 14.5.1 The Rectangular Coordinate System 14.5.2 The Polar Coordinate System 14.6 Example Devices 14.6.1 Characterization of a Precision 3.5 mm Adapter 14.6.2 Characterization of a Band-Pass Filter 14.6.3 Phase Matching of Coaxial Cables 14.6.4 Characterization of a Differential Transmission Line 14.6.5 Summary of Example Devices 14.7 Summary 14.8 References Chapter 15 Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems 15.1 Introduction 15.2 Multiple Gigabit per Second Computer Chip-to-Chip I/O Link Architectures 15.2.1 PCI Express 15.2.2 FBDIMM 15.2.3 SATA 15.3 Chip-to-Chip Link System BER and Signaling Tests 15.3.1 PCI Express Testing 15.3.2 FBDIMM Architecture and Testing 15.3.3 SATA Architecture and Testing 15.3.4 JNB Testing for Multiple Gigabit per Second Standards 15.4 Testing Examples 15.4.1 Transmitter Testing 15.4.2 Reference Clock Testing 15.4.3 PLL Testing 15.5 Future Technology Trends for High-Speed Links 15.6 Summary 15.7 References Appendix A: Pseudo-Random Binary Sequences A.1 Introduction A.2 Linear Feedback Shift Register Implementation A.2.1 Characteristic Polynomial A.2.2 LFSR Operation A.2.3 Primitive Polynomials A.2.4 Nonprimitive Polynomials A.3 Properties of PRBS Sequences A.3.1 Pseudo-Random Properties A.3.2 Decimation A.3.3 Multiplexing A.4 PRBS-Based Test Patterns A.4.1 PRBS 2[sup(n)] A.4.2 Zero Substitution and Zero Suppression PRBS A.4.3 Marker Density PRBS A.5 Standardized PRBSs for Communication System Testing A.6 Applications A.7 References Appendix B: Passive Elements for Test Setups B.1 Introduction B.2 Fixed Step Attenuators B.3 Power Splitters and Dividers B.3.1 Power Splitters B.3.2 Power Dividers B.3.3 N-Way Dividers B.3.4 Examples of Applications B.4 Variable Delay Lines B.5 Filters and Transition Time Converters B.5.1 Near Gaussian Filters B.5.2 Other Filter Types B.5.3 Transition Time Converters B.6 DC Blocks and Bias Ts B.6.1 DC Blocks B.6.2 Bias Ts Appendix C: Coaxial Cables and Connectors C.1 Electrical Properties of Coaxial Structures C.1.1 Capacitance and Inductance C.1.2 Characteristic Impedance C.1.3 Propagation Velocity C.1.4 Transmission Loss C.2 Coaxial Cables C.2.1 Construction of Coaxial Cables C.2.2 Cable Standards C.2.3 Matched Cable Pairs for Differential Signaling C.3 Coaxial Connectors C.3.1 Connector Grades C.3.2 General-Purpose Connectors C.3.3 High-Performance Connectors C.3.4 Making Connections C.4 References Appendix D: Supplemental Materials for Chapter 3 D.1 8B10B Encoding Rules D.2 Laser Power Controllers and Encoder Run Limits D.3 AC Coupling Network Equations and Characteristics D.4 Band-Pass Response of the Laser Transmitter D.4.1 Simulation 1 Starting Point D.4.2 Simulation 2 D.4.3 Simulation 3 D.4.4 Simulation 4 D.4.5 Simulation 5 D.4.6 Simulation 6 D.4.7 Simulation 7 D.4.8 Simulation 8 D.4.9 Simulation 9 D.4.10 Simulation 10 D.4.11 Summary D.5 Characteristics of Power Supply Noise Test Systems D.5.1 Simulation 1 D.5.2 Simulation 2 D.5.3 Simulation 3 D.5.4 Simulation 4 D.5.5 Simulation 5 D.5.6 Summary Index A B C D E F G H I J K L M N O P Q R S T U V W X Z